Logic Design - VHDL Introduction

    Hello my friends, it's me again Drifter Programming. After the long period of Theory and Multisim Implementation posts, I will now start getting into programming in VHDL. But, before starting out Coding I want to give you some more information about HDL Languages and why we need them. This post will get into the differences between normal Programming and Hardware Programming. Lastly I will give you some Theory stuff that is needed for VHDL. So, why wait any longer? Let's get started!


Why do we need HDL Languages?

    The answer will be pretty simple if I first tell you what those Languages are all about. A Hardware Description Language (HDL) is specialized to describe the structure and behaviour of digital logic circuits. But, what gives us the need of having special Languages to describe such Circuits? Well, thing about how the Instructions are being called inside of normal Programming Languages like C or Java. In those, the Instructions are called one after another sequentially. In Circuits we can't assign Inputs for Gates or Sub-Circuits sequentially, but this process needs to be made simultaneously for both of them. So, the reason why we need HDL's is that we want simultaneous assignments! Hope you can understand what I mean.

    To make things more clear let's get into a simple Example. Think of an AND Gate with 2 Inputs. We already said that the value of those Inputs must be assigned simultaneously. Can we write this in a Language like C?

C pseudocode:

A = 1;
B = 1;
C = A AND B;

    When running this Code we can directly see that first A gets the value 1, then B gets the value 1 and lastly C that is the Output of the AND Gate gets the value A AND B = 1 AND 1 = 1.

    In HDL Languages A, B and the Output C would get the values directly (C maybe after a small Gate delay!). Cause, that's what they are made for. I hope that you know understand some things even better if you previously don't!

HDL Languages:

    The 2 main HDL Languages used today are VHDL and Verilog. Both can create the same Circuit and don't have any limitations. The only thing that changes is the Syntax. Verilog has a very C-like appearance and VHDL has a new style that differentiates this language even more from Control-Flow Languages like C or Java. I know both, but prefer writing in VHDL because of it's appereance and this is a matter of preference I have. I will start talking about VHDL and also mainly focus on it even on more advanced stuff later on (like Computer Component Programming), but will also show you some stuff about Verilog later on!

VHDL Theory:

    Before Getting into Coding I want to give you some more information about VHDL and what Coding "Styles" we have. Those Coding Styles are called Circuit Decriptions. We can describe and write Code for a Circuit in 3 Ways in VHDL. 

Those are:

  • Structural Description (describe circuit using logic gates and circuits, referring only to the connections between those. For this we need to know the Circuit Structure)
  • Behavioral Description (algorithm in form of code that the Circuit will implement having only inputs and outputs. For this we need to know the Circuit Truth Table)
  • Dataflow Description (display the flow of data using a Diagram/Chart or writing only the operations needed for each internal action in. For this we need to know the Circuit Functions)

    I don't think that you will understand a lot if we don't get into Coding, but this explanation of each Coding "Style" is the best I could give! So, let's now get to the pros/cons of each Description.

Those are:

  • Structural is great when we already have our Circuit build up or when we want a more analytic representation of our Logic Circuit. We also don't have complicated Expressions for the Input-Output relations. The problems come when we have a big and complicated Circuit that contains a lot of Gates. Then it will take a lot of time to write all this stuff down!
  • Behavioral is great when we have a Truth Table, cause then we simply have to assign the Output values for each different Input Combination. The problem with this kind of Coding is that we don't have any control over the structure, connections and Gates that the Circuit will contain, cause the compiler takes care of it by itself
  • Dataflow is great when we already have the Functions for the Outputs (and maybe Inputs in Sequential Circuits) given to us. Cause then we simply have to assign this Expression to the Outputs. We again have the same problem as in Behavioral and don't have any control over the circuit structure.

    The last two are similar and you will understand the difference when we get into Coding, cause Behavioral contains a Process to check each Input Combination and Dataflow assignments directly.

I will not get into much more today and this is actually it! Hope you enjoyed it!

    Next time in VHDL we will get into the Basic Coding Structure. We will talk about the coding structure/layout, simple Statements, Processes and Libraries.

Until next time...Bye!

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